1. Field of the Invention
The present invention relates to a random number generator formed from oscillators at different frequencies.
2. Description of the Related Art
FIG. 1 very schematically shows in the form of blocks a conventional example of a random number generator.
Such a generator uses a first voltage-controlled oscillator (VCO) 1 in a relatively high frequency range (HF). The control of oscillator 1 originates either from an oscillator of lower frequency (MF) (not shown) or from electronic noise generally coming from the same integrated circuit. The output of oscillator 1 provides a triangular signal of variable frequency intended to form, possibly after shaping by a comparator 2, input signal D of a flip-flop 3, output Q of which provides a digital train forming a random number. The function of comparator 2 simply is to shape as square pulses the signal provided by oscillator 1. For this purpose, one of its inputs, for example, its non-inverting input, receives the output of oscillator 1 while its other output (for example, inverting) receives a reference voltage provided by a resistive dividing bridge R1, R2 to the junction point of which is connected a filtering capacitor C providing the reference voltage for comparator 2.
A second oscillator 4 (OSC), at a relatively low frequency (BF) with respect to the frequency of oscillator 1 provides a clock signal to input CLK of flip-flop 3. Frequency BF of oscillator 4 is predetermined.
At each edge (for example, rising) of the output signal of oscillator 4, flip-flop 3 takes into account the state present on its D input. Since this state is at zero or at one according to the signal provided by oscillator 1, the output of flip-flop 3 takes an output state 0 or 1. Since the output signal of oscillator 1 has a frequency conditioned by noise, the succession of states 1 or 0 at the output of flip-flop 3 forms a sequence of random states.
For the circuit of FIG. 1 to operate in this manner, oscillators 1 and 4 must not be synchronized. Indeed, if they are, a repetitive sequence of bits necessarily appears at the output of flip-flop 3. This is in particular why the voltage-control input of oscillator 1 is driven by a signal of intermediary frequency (that is, ranging between frequency BF and the minimum frequency of oscillator 1) or by noise. This is also why the output of oscillator 1 preferentially generates a triangular signal rather than a sinusoid to guarantee the equiprobable character of the output frequencies of oscillator 1. The frequency of oscillator 1 varies within a predetermined fixed range according to the position of a voltage control on the intermediary frequency ramp.
A disadvantage of the circuit of FIG. 1 is that there however remains a risk of oscillator synchronization. Indeed, a noise at the frequency of oscillator 1 transfers onto the supply and thus pollutes oscillator 4. This noise synchronizes the two signals. Indeed, the triggerings are performed with respect to thresholds. Now, the presence of HF noise superposed to the lower frequency imposes that the threshold triggerings will occur with priority on this noise. This effectively amounts to synchronizing the signals.
An example of a random number generator such as illustrated in FIG. 1 is described in article “The Intel Random number generator” by Benjamin Jun and Paul Kocher, published on Apr. 22, 1999, by Cryptography Research Inc.